1. Field of the Invention
The present invention relates to, for example, a non-volatile semiconductor memory device (EEPROM) capable of electrical writing and erasing such as a flash memory and so on and a writing method thereof.
2. Description of the Related Art
The high-density integrated NAND-type non-volatile semiconductor memory device is well-known and composed of NAND strings with serial connections of a plurality of memory cell transistors (called memory cell in the following) between the bit line and the source line (for example, referring to reference documents 1˜4).
In the general NAND-type non-volatile semiconductor memory device, regarding the erasing, a high voltage of 20V, for example, is added to the semiconductor substrate, and 0V is added to the word line. Accordingly, the electrons are ejected from the floating gate, a charge accumulation layer made of for example, poly-silicon and so on, and the threshold voltage is lower than the erasing threshold voltage (for example, −3V). On the other hand, regarding the writing (programming), 0V is added to the semiconductor substrate, and the high voltage of 20V, for example, is added to the control gate. Therefore, by injecting the electrons from the semiconductor substrate to the floating gate, the threshold voltage is greater than the writing threshold voltage (for example, 1V). The memory cell receives such threshold voltages, and the status may be determined by adding the reading voltage (for example, 0V), between the writing threshold voltage and the erasing threshold voltage, to the control gate, and determined by whether there is current flowing on the memory cell or not. Therefore, writing is implemented to the selected memory cell among the memory cells which are connected in series within the NAND string, and the pass voltage (for example, 8V) is added to such word lines for the un-selected memory cells.
In the non-volatile semiconductor memory device composed as above, writing is executed by the programming operation on the memory cell which is the writing object, and the threshold voltage increases since the electrons are injected to the floating gate of the memory cell transistor. Accordingly, the current does not flow even though the voltages, which are lower than the threshold voltage, are added to the gate; therefore, the status of writing the data “0” is reached. Generally, the writing characteristics and the threshold voltage of the memory cell of the erasing status are uneven. Accordingly, the predetermined writing voltage is added to implement the program operation, and the threshold voltage is greater than the verify level for verification, and the distribution range of the threshold voltages of the memory cell after writing has a certain width.
In the case of anon-volatile semiconductor memory device of a multi-level memory cell with multi-levels for setting different threshold voltages on the memory cell, the threshold voltages are widely distributed, and it becomes difficult to implement the actual data record in the narrow gap between the adjacent level values. To solve the problem, in the Reference Document 5, the non-volatile memory core circuit for recording multi-levels is included by setting a plurality of different threshold voltages for the memory cell, and the control circuit to control the writing toward the memory core circuit is included. The control circuit is featured by that when programming the memory cell with one threshold voltage, the memory cell which is set with the above threshold voltage and the memory cell which is set with the threshold voltage greater than the above threshold voltage are both programmed with the above threshold voltage, and it is programmed (written) in sequence from the smaller threshold voltage than the above different threshold voltages.
However, when the non-volatile semiconductor memory device is programmed, the phenomenon of program disturbance happens. Specifically, there are bad modes of increasing the threshold voltage by the program operation. The programming for the same word line (the control gate) is frequently repeated, and the threshold voltage increases due to the high programming voltage in the non-writing memory cell and the non-selected memory cell in common with the word line. In addition, the threshold voltage increases due to the pass voltage of the un-selected word line of the selected NAND string in writing. Furthermore, in the NAND string which has shrunk by scaling in the recent years, the phenomenon of increasing the threshold voltage by the hot carriers caused by the boosted channel voltage due to the pass voltage added to the un-selected word line and the program voltage added to the above selected word line is also detected.